Saleh Alalaki, M. and Opoku Agyeman, M. (2017) A study of recent contributions on simulation tools for Network-on-Chip (NoC). International Journal of Computer Systems. 4(3) 2394-1065. (In Press)
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Abstract:
The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a new system architecture to overcome intra-communication issues. New approaches and methodologies have been developed by many researchers to improve NoC. Also, many NoC simulation tools have been proposed and adopted by both academia and industry. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.
Uncontrolled Keywords:
Network-on-Chip (NoC), System-on-Chip(SoC), embedded systems, computer architecture
Creators:
Saleh Alalaki, M. and Opoku Agyeman, M.
Faculties, Divisions and Institutes:
Date:
18 March 2017
Date Type:
Acceptance
Journal or Publication Title:
International Journal of Computer Systems
Volume:
4
Number:
3
Language:
English
ISSN:
2394-1065
Status:
In Press
Refereed:
Yes
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