Northampton Electronic Collection of Theses and Research

An efficient channel model for evaluating Wireless NoC architectures

Opoku Agyeman, M., Vien, Q.-T., Hill, G., Turner, S. J. and Mak, T. (2016) An efficient channel model for evaluating Wireless NoC architectures. In: 2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW) :. Online: IEEE. pp. 85-90.

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PaperWAMCA.pdf - Accepted Version
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8843:16646
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OpokuAgyeman20168843.pdf - Accepted Version
Information
Abstract:
Wireless Networks-on-Chip (WiNoCs) have emerged to solve the scalability and performance bottleneck of conventional wired NoC architectures. However unlike communication in the macro-world, on-chip communication poses several constraints, hence there is the need for simulation and design tools that consider the effect of the wireless channel at the nanotechnology level. In this paper, we present a parameterizable channel model for WiNoCs which takes into account practical issues and constraints of the propagation medium, such as transmission frequency, operating temperature, ambient pressure and distance between the on-chip antennas. The proposed channel model demonstrates that total path loss of the wireless channel in WiNoCs suffers from not only dielectric propagation loss (DPL) but also molecular absorption attenuation (MAA) which reduces the reliability of the system.
Creators:
Opoku Agyeman, M., Vien, Q.-T., Hill, G., Turner, S. J. and Mak, T.
Publisher:
IEEE
Faculties, Divisions and Institutes:
Faculties > Faculty of Arts, Science & Technology > Computing
Date:
9 September 2016
Date Type:
Acceptance
Page Range:
pp. 85-90
Title of Book:
2016 International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW) :
Place of Publication:
Online
Language:
English
ISBN:
978-1-5090-4844-1
DOI:
10.1109/SBAC-PADW.2016.23
Status:
Published / Disseminated
Refereed:
Yes
Related URLs:
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